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SC4524C
28V 2A Step-Down Switching Regulator
POWER MANAGEMENT Features

Description
The SC4524C is a constant frequency peak current-mode step-down switching regulator capable of producing 2A output current from an input ranging from 3V to 28V. The switching frequency of the SC4524C is programmable up to 2MHz, allowing the use of small inductors and ceramic capacitors for miniaturization, and high input/ output conversion ratio. The SC4524C is suitable for next generation XDSL modems, high-definition TVs and various point of load applications. Peak current-mode PWM control employed in the SC4524C achieves fast transient response with simple loop compensation. Cycle-by-cycle current limiting and hiccup overload protection reduces power dissipation during output overload. Soft-start function reduces input startup current and prevents the output from overshooting during power-up. The SC4524C is available in SOIC-8 EDP package.
Wide input range: 3V to 28V 2A Output Current 200kHz to 2MHz Programmable Frequency Precision 1V Feedback Voltage Peak Current-Mode Control Cycle-by-Cycle Current Limiting Hiccup Overload Protection with Frequency Foldback Soft-Start and Enable Thermal Shutdown Thermally Enhanced 8-pin SOIC Package Fully RoHS and WEEE compliant
Applications

XDSL and Cable Modems Set Top Boxes Point of Load Applications CPE Equipment DSP Power Supplies LCD and Plasma TVs
Typical Application Circuit
10V - 28V C4 2.2 F D1 1N4148 C1 0.33 F L1 8.2 H R4 42.2k
SS270 REV 4
Efficiency
V IN
90 85 80
5V/2A OUT
IN
BST SW
Efficiency (%)
75 70 65 60 55 50 45 40 0
VIN = 12V
VIN = 24V
SS/EN
SC4524C
FB
COMP C7 10nF R7 28.0k
ROSC
GND D2 20BQ030 R6 10.5k C2 22 F
C8 22pF
R5 15.8k
C5 2.2nF
L1: Coiltronics DR73-8R2
C2: Murata GRM31CR60J226K C4: Murata GRM31CR71H225K
0.5
1
1.5
2
Load Current (A)
Figure 1. 1MHz 10V-28V to 5V/2A Step-down Converter
Dec. 2, 2010 1
Fig.1 Efficiency of the 1MHz 10V-28V to 5V/2A Step-Do
SC4524C
Pin Configuration Ordering Information
Device
SC4524CSETRT(1)(2)
SW IN ROSC GND 1 2 3 4 9 8 7 6 5 BST FB COMP SS/EN
Package
SOIC-8 EDP Evaluation Board
SC4524CEVB
Notes: (1) Available in tape and reel only. A reel contains 2,500 devices. (2) Available in lead-free package only. Device is fully WEEE and RoHS compliant and halogen-free.
(8 - Pin SOIC - EDP)
Marking Information
yyww=Date code (Example: 0752) xxxxx=Semtech Lot No. (Example: E9010)
2
SC4524C
Absolute Maximum Ratings
VIN Supply Voltage .................................... -0.3 to 32V BST Voltage ...................................................... 42V BST Voltage above SW .......................................... 36V SS Voltage ...................................................-0.3 to 3V FB Voltage ................................................... -0.3 to VIN SW Voltage ................................................ -0.6 to VIN SW Transient Spikes (10ns Duration)......... -2.5V to VIN +1.5V Peak IR Reflow Temperature ...............................
(2)
Thermal Information
Junction to Ambient (1) .................................... 36C/W Junction to Case (1) ....................................... 5.5C/W Maximum Junction Temperature........................... 150C Storage Temperature .............................. -65 to +150C Lead Temperature (Soldering) 10 sec ..................... 300C
Recommended Operating Conditions
Input Voltage Range .................................... 3V to 28V Maximum Output Current .................................... 2A Operating Ambient Temperature ............... -40 to +105C Operating Junction Temperature ............... -40 to +125C
260C
ESD Protection Level ....................................... 2000V
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES(1) Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Tested according to JEDEC standard JESD22-A114-B.
Electrical Characteristics
Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40C < TJ < 125C, ROSC = 12.1k.
Parameter Input Supply
Input Voltage Range VIN Start Voltage VIN Start Hysteresis VIN Quiescent Current VIN Quiescent Current in Shutdown
Conditions
Min
3
Typ
Max
28
Units
V V mV
VIN Rising
2.70
2.82 225
2.95
VCOMP = 0 (Not Switching) VSS/EN = 0, VIN = 12V
2 40
2.6 52
mA A
Error Amplifier
Feedback Voltage Feedback Voltage Line Regulation FB Pin Input Bias Current Error Amplifier Transconductance Error Amplifier Open-loop Gain COMP Pin to Switch Current Gain COMP Maximum Voltage COMP Source Current COMP Sink Current VIN = 3V to 28V VFB = 1V, VCOMP = 0.8V 0.980 1.000 0.005 -170 300 60 10 -340 1.020
V %/V nA
-1
dB A/V
V A
VFB = 0.9V VFB = 0.8V, VCOMP = 0.8V VFB = 1.2V, VCOMP = 0.8V
(Note 1) ISW = -2.6A 2.6
2.4 17 25
Internal Power Switch
Switch Current Limit Switch Saturation Voltage 3.3 250 4.3 400 A mV
3
SC4524C
Electrical Characteristics (Cont.)
Unless otherwise noted, VIN = 12V, VBST = 15V, VSS = 2.2V, -40C < TJ < 125C, ROSC = 12.1k.
Parameter
Minimum Switch On-time Minimum Switch Off-time Switch Leakage Current Minimum Bootstrap Voltage BST Pin Current
Conditions
Min
Typ
135 100
Max
Units
ns ns
10 ISW = -2.6A ISW = -2.6A 1.8 60 2.3 95
A V mA
Oscillator
Switching Frequency ROSC = 12.1k ROSC = 73.2k ROSC = 12.1k, VFB = 0 ROSC = 73.2k, VFB = 0 1.04 230 100 35 60 1.3 300 1.56 370 250 90 MHz kHz kHz
Foldback Frequency
Soft Start and Overload Protection
SS/EN Shutdown Threshold SS/EN Switching Threshold Soft-start Charging Current Soft-start Discharging Current Hiccup Arming SS/EN Voltage Hiccup SS/EN Overload Threshold Hiccup Retry SS/EN Voltage 0.2 0.3 1.2 1.9 1.6 2.4 1.5 3.2 0.4 1.4 V V A A V V 1.2 V
VFB = 0 V VSS/EN = 0 V VSS/EN = 1.5 V VSS/EN Rising VSS/EN Falling VSS/EN Falling
0.95
2.15 1.9 0.6 1.0
Over Temperature Protection
Thermal Shutdown Temperature Thermal Shutdown Hysteresis Note 1: Switch current limit does not vary with duty cycle. 165 10 C C
4
SC4524C
Pin Descriptions
SO-8
1 2 3 4
Pin Name
SW IN ROSC GND
Pin Function
Emitter of the internal NPN power transistor. Connect this pin to the inductor, the freewheeling diode and the bootstrap capacitor. Power supply to the regulator. It is also the collector of the internal NPN power transistor. It must be closely bypassed to the ground plane. An external resistor from this pin to ground sets the oscillator frequency. Ground pin Soft-start and regulator enable pin. A capacitor from this pin to ground provides soft-start and overload hiccup functions. Hiccup can be disabled by overcoming the internal soft-start discharging current with an external pullup resistor connected between the SS/EN and the IN pins. Pulling the SS/EN pin below 0.2V completely shuts off the regulator to low current state. The output of the internal error amplifier. The voltage at this pin controls the peak switch current. A RC compensation network at this pin stabilizes the regulator. The inverting input of the error amplifier. If VFB falls below 0.8V, then the switching frequency will be reduced to improve short-circuit robustness (see Applications Information for details). Supply pin to the power transistor driver. Tie to an external diode-capacitor bootstrap circuit to generate drive voltage higher than VIN in order to fully enhance the internal NPN power transistor. The exposed pad serves as a thermal contact to the circuit board. It is to be soldered to the ground plane of the PC board.
5
SS/EN
6 7 8 9
COMP FB BST Exposed Pad
5
SC4524C
Block Diagram
IN COMP
6 2
SLOPE COMP
+
+
+ EA + OC + ILIM -
+ ISEN 5.5m 18mV BST
FB
7
V1 + PWM FREQUENCY FOLDBACK
8
S R Q POWER TRANSISTOR
ROSC
3
OSCILLATOR
CLK
1.2V OVERLOAD
A1 R
+
PWM
1
SW
R SS/EN
5
1V
1.9V FAULT
REFERENCE & THERMAL SHUTDOWN
SOFT START AND OVERLOAD HICCUP CONTROL
GND
4
Figure 2. SC4524C Block Diagram
1.9V IC 2.4 A
B4 + B1
S Q R OVERLOAD
SS/EN
1V/2.15V
B2
FAULT
ID 3.9 A
_ Q
S R
OC
PWM
B3
Figure 3. Soft-start and Overload Hiccup Control Circuit
6
Curve 2
SC4524A/B
Curve 3
SC4524A SS270 REV 6-7
SC4524C
Typical Characteristics
Efficiency
V O=5V V O=3.3V V O=2.5V
90 85 80 75 70 65 60 55 50 40 0 0.5
90 85 80 75 70 65 60 55 50 40
Efficiency
Feedback Voltage vs Temperature
1.02 VIN =12V 1.01 1.00 0.99 0.98 0.97
V O=5V V O=3.3V
Efficiency (%)
Efficiency (%)
V O=1.5V
Curve 5 45
SS270 REV 6-7
1MHz, VIN =12V D2 =20BQ030
Curve 6 45
1.5 2 SS270 REV 6-7 0 0.5
1MHz, VIN =24V D2 =20BQ030
1
VFB (V)
V O=2.5V
1
1.5
2
-50
-25
0
25
50
75
o
100 125
Load Current (A)
Load Current (A) SS270 REV 6-7
Temperature ( C)
1000
Frequency Setting Resistor vs Frequency
VIN =12V
Frequency vs Temperature
1.2
Foldback Frequency vs VFB
1.25 1 0.75 0.5 TA=25oC 0.25 ROSC =12.1k 0 0.00 ROSC =73.2k
Normalized Frequency
1.1 ROSC =73.2k 1.0 ROSC =12.1k
100
10
Curve 8
1 0 SS270 REV 6-7 0.25 0.5 0.75 1 1.25 1.5 1.75 2
0.9
Curve 9
-50 -25 0 25 50 75 100 125 Temperature (OC)
0.8
Normalized Frequency
ROSC (k)
0.20
0.40
0.60
0.80
1.00
Frequency (MHz)
SS270 REV 6-7
VFB (V)
SS270 REV 6-7
300 250
Switch Saturation Voltage vs Switch Current
Switch Current Limit vs Temperature
4.5 100.0
BST Pin Current vs Switch Current
VIN =12V
125oC 25oC -40oC
200 150 100 50 0.0 0.5
3.5
BST Pin Current (mA)
Current Limit (A)
4.0
75.0
VBST =15V
VCESAT (mV)
50.0
-40oC 125oC
3.0
25.0
1.0
1.5
2.0
2.5
2.5 -50 -25 0 25 50 75 100 125 Temperature (OC)
0.0 0 0.5 1 1.5 2 2.5 3 Switch Current (A)
Switch Current (A)
7
Curve 11
SS270 REV 6-7
Curve 12
SS270 REV 6-7
SC4524C
Typical Characteristics (Cont.)
SS270 REV 6-7
VIN Thresholds vs Temperature
3.0 2.9
Start
2.5 2.0
VIN Supply Current vs Soft-Start Voltage
125oC -40oC
100 80
VIN Shutdown Current vs VIN
VSS = 0
VIN Threshold (V)
Current (mA)
Current (uA)
2.8 2.7 2.6
1.5 1.0 0.5 0.0
60 -40oC 40 20 0 125oC
Curve 14 2.5
2.4 -50 -25 0
UVLO
Curve 15
0 0.5 1 VSS (V) 1.5 2
SS270 REV 6-7
25
50
o
75
100 125
0
5
10
15 VIN (V)
20
25
30
Temperature ( C)
SS270 REV 6-7
SS270 REV 6-7
VIN Quiescent Current vs VIN
2.5 2.0 125oC -40oC 0.40
SS Shutdown Threshold vs Temperature
Soft-Start Charging Current vs Soft-Start Voltage
0.0 -0.5
SS Threshold (V)
0.35
Current (mA)
Current (uA)
1.5 1.0 0.5 0.0 0 5 10 15 VIN (V) 20 25 30
-1.0 -1.5 -2.0 -2.5
125oC
0.30
-40oC
0.25
VCOMP = 0 0.20 -50 -25 0 25 50
o
-3.0 75 100 125 0 0.5 1 VSS (V) 1.5 2
Temperature ( C)
8
SC4524C
Applications Information
Operation The SC4524C is a constant-frequency, peak current-mode, step-down switching regulator with an integrated 28V, 2.6A power NPN transistor. Programmable switching frequency makes the regulator design more flexible. With the peak current-mode control, the double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop. This simplifies loop compensation and achieves fast transient response with a simple Type-2 compensation network. As shown in Figure 2, the switch collector current is sensed with an integrated 5.5mW sense resistor. The sensed current is summed with a slope-compensating ramp before it is compared with the transconductance error amplifier (EA) output. The PWM comparator trip point determines the switch turn-on pulse width. The current-limit comparator ILIM turns off the power switch when the sensed signal exceeds the 18mV current-limit threshold. Driving the base of the power transistor above the input power supply rail minimizes the power transistor saturation voltage and maximizes efficiency. An external bootstrap circuit (formed by the capacitor C1 and the diode D1 in Figure 1) generates such a voltage at the BST pin for driving the power transistor. Shutdown and Soft-Start Table 2: Fault conditions and protections The SS/EN pin is a multiple-function pin. An external capacitor (4.7nF to 22nF) connected from the SS pin to ground sets the soft-start and overload shutoff times of the regulator (Figure 3). The effect of VSS/EN on the SC4524C is summarized in Table 1. Table 1: SS/EN operation modes
SS/EN <0.2V 0.4V to 1.2V 1.2V to 2.15V >2.15V Mode Shutdown Not switching Switching & hiccup disabled Switching & hiccup armed Supply Current 18uA @ 5Vin 2mA Load dependent
When the SS/EN pin is released, the soft-start capacitor is charged with an internal 1.9A current source (not shown in Figure 3). As the SS/EN voltage exceeds 0.4V, the internal bias circuit of the SC4524C turns on and the SC4524C draws 2mA from VIN. The 1.9A charging current turns off and the 2.4A current source IC in Figure 3 slowly charges the soft-start capacitor. The error amplifier EA in Figure 2 has two non-inverting inputs. The non-inverting input with the lower voltage predominates. One of the non-inverting inputs is biased to a precision 1V reference and the other non-inverting input is tied to the output of the amplifier A1. Amplifier A1 produces an output V1 = 2(VSS/EN -1.2V). V1 is zero and COMP is forced low when VSS/EN is below 1.2V. During start up, the effective non-inverting input of EA stays at zero until the soft-start capacitor is charged above 1.2V. Once VSS/ exceeds 1.2V, COMP is released. The regulator starts to EN switch when VCOMP rises above 0.4V. If the soft-start interval is made sufficiently long, then the FB voltage (hence the output voltage) will track V1 during start up. VSS/EN must be at least 1.83V for the output to achieve regulation. Proper soft-start prevents output overshoot. Current drawn from the input supply is also well controlled. Overload / Short-Circuit Protection Table 2 lists various fault conditions and their corresponding protection schemes in the SC4524C.
Condition IL>ILimit, VFB>0.8V IL>ILimit, VFB<0.8V VSS/EN Falling SS/EN<1.9V Tj>160C
Fault Over current Over current Persistent over current or short circuit Over temperature
Protective Action Cycle-by-cycle limit at programmed frequency Cycle-by-cycle limit with frequency foldback Shutdown, then retry (Hiccup) Shutdown
Pulling the SS/EN pin below 0.2V shuts off the regulator and reduces the input supply current to 18A (VIN = 5V).
As summarized in Table 1, overload shutdown is disabled during soft-start (VSS/EN<2.15V). In Figure 3, the reset input of the overload latch B2 will remain high if the SS/EN voltage is below 2.15V. Once the soft-start capacitor is charged above 2.15V, the output of the Schmitt trigger B1 goes high, the reset input of B2 goes low and hiccup
9
SC4524C
Applications Information (Cont.)
becomes armed. As the load draws more current from the regulator, the current-limit comparator ILIM (Figure 2) will eventually limit the switch current on a cycle-bycycle basis. The over-current signal OC goes high, setting the latch B3. The soft-start capacitor is discharged with (ID - IC) (Figure 3). If the inductor current falls below the current limit and the PWM comparator instead turns off the switch, then latch B3 will be reset and IC will recharge the soft-start capacitor. If over-current condition persists or OC becomes asserted more often than PWM over a period of time, then the soft-start capacitor will be discharged below 1.9V. At this juncture, comparator B4 sets the overload latch B2. The soft-start capacitor will be continuously discharged with (ID - IC). The COMP pin is immediately pulled to ground. The switching regulator is shut off until the soft-start capacitor is discharged below 1.0V. At this moment, the overload latch is reset. The soft-start capacitor is recharged and the converter again undergoes soft-start. The regulator will go through softstart, overload shutdown and restart until it is no longer overloaded. If the FB voltage falls below 0.8V because of output overload, then the switching frequency will be reduced. Frequency foldback helps to limit the inductor current when the output is hard shorted to ground. Table 3: Resistor for Typical Switching Frequency
Freq. (k) 200 250 300 350 400 500 600 ROSC (k) 110 84.5 69.8 57.6 49.9 38.3 30.9 Freq. (k) 700 800 900 1000 1100 1200 1300 ROSC (k) 25.5 21.5 18.2 15.8 14.0 12.4 11.0 Freq. (k) 1400 1500 1600 1700 1800 1900 2000 ROSC (k) 9.76 8.87 8.06 7.15 6.34 5.62 5.23
Minimum On Time Consideration
AC =
V The operating duty cycle of a non-synchronous stepR = R6 O - 1 down 4 switching V 1 . 0 regulator in continuous-conduction mode (CCM) is given by D= VO + VD VIN + VD - VCESAT
(2)
AC =
Fig.4
During normal operation, the soft-start capacitor is charged to 2.4V. Setting the Output Voltage The regulator output voltage is set with an external resistive divider (Figure 1) with its center tap tied to the FB pin. For a given R6 value, R4 can be found by
where VCESAT is the switch saturation voltage and VD is voltage drop across the rectifying diode. ( V + VD ) (1 - D) DIL = O FSW L In peak current-mode1 control, the PWM modulating ramp is the sensed current ramp of the power switch. This currentVrampD is (absent unless the switch is turned ( + V ) 1 - D) L1 = O on. The intersection ofSW ramp with the output of the 20 % IO F this voltage feedback error amplifier determines the switch pulse width. The propagation delay time required to immediately turn off D (1 - D) after it is turned on is the IRMS _ CIN = I O the switch SS270 REV 6-7 minimum controllable switch on time (TON(MIN)).
R7 = C5 = C8 =
Vo = Vc
V R4 = R6 O - 1 1 .0 V
(1)
VO + VD Setting the Switching Frequency D= VIN + VD - VCESAT The switching frequency of the SC4524C is set with an external resistor from the ROSC pin to ground. Table 3 lists standard VO + VD )values for typical frequency setting. ( resistor (1 - D) DIL = FSW L 1 L1 = ( VO + VD ) (1 - D) 20 % IO FSW
1 VFB 1 R7 = AC = - 20 log G R 2 F C V 160 CA S CO O IO C IN >140 1 1 .0 C 5 = DVIN F1 = 15 4 SW AC = - 20 log -3 3 -6 3 .3 2 80 10 22 10 28 6 . 1 10 120 C8 =
TON_MIN (ns)
1 DVO = DIL ESR + F =1.5V, I8=1A,SW C O V 1MHz
200 180
O O
Minumum On Time vs Temperature
GPWM
10 20 -50 -25 0 25 50 75 100 125 R7 = = 22 . 3 k 0 . 28 10 -3 Temperature (OC) 1 C5 = = 0 . 45 nF 3 Variation of Minimum On Time 2 Figure 4. 22 . 1 10 3 16 10 with Ambient Temperature 1 C8 = = 12pF 2 600 10 3 22 . 1 10 3
15 . 9
100
10
Applications Information (Cont.)
Closed-loop measurement shows that the SC4524C minimum on time is about 120ns at room temperature (Figure 4). If the required switch on time is shorter than the minimum on time, the regulator will either skip cycles or it will jitter. To allow for transient headroom, the minimum operating switch on time should be at least 20% to 30% higher than the worst-case minimum on time.
R4 = R6 O - 1 1 .0 V V R4 = R6 O - 1 V. V 1 O0+ VD D= VIN + VD - VCESAT VO + VD D= VIN + VD - VCESAT ( V + VD ) (1 - D) DIL TheO least 2.6A.= maximum deliverable load current for the FSW L 1 SC4524C is 2.6A minus one half of the inductor ripple ( V + VD ) (1 - D) current.IL = O D ( V + F D ) (L - D) V1 L 1 = O SW 1 20 % O FSW Input Decoupling ICapacitor ( V + V ) (1 - D) L1 = O D The input capacitorOshould be chosen to handle the RMS 20 % I FSW IRMS _ CIN = O D (1 - D) ripple current ofIa buck converter. This value is given by
IRMS _ CIN = I O D (1 - D)
SC4524C
AC = AC = AC = R7 =
R 75 = C=
C5 = C8 =
(5)
Minimum Off Time Limitation The PWM latch in Figure 2 is reset every cycle by the clock. The clock also turns off the power transistor to refresh the bootstrap capacitor. This minimum off time limits the attainable duty cycle of the regulator at a given switching frequency. The measured minimum off time is 100ns typically. If the required duty cycle is higher than the attainable maximum, then the output voltage will not V be able toRreachOits-set value in continuous-conduction R4 = 6 1 1 .0 V mode. Inductor Selection D VO + V D= VIN + VD - VCESAT The inductor ripple current for a non-synchronous stepdown converter in continuous-conduction mode is
1 DV = DIL ESR + The inputOcapacitance must also be high enough to keep 8 FSW C O input ripple voltage within specification. This is important 1 from the regulator. The in reducing the conductive EMI DVO = DIL ESR + can be8 FSW C O from input capacitance estimated
C8 = Vo = Vc Vo = Vc GPWM GPWM R7 = AC =
( V V V ) (1 - D) + D R R 4IL== 6 O O D- 1 FV 1 . 0SW L 1
(3)
where FSW is the switching frequency and L1 is the ( + +V inductance. VO VOVD ) D(1 - D) L 1== D VIN 20VD -OVCESAT + % I FSW An inductor ripple current between 20% to 50% of the maximum load current gives a good compromise among IRMS CINV= + V size. - D) ( D) O efficiency,_ cost Iand )D (11-Re-arranging Equation (3) and ( D DIL = O inductor ripple current, the inductor is assuming 35% F L SW 1 given by
( V + V ) (1 - D) 1 L 1 O = DIL ESR + DV = O D 35 % IO FSW FSW C O 8
(4)
If the input voltage varies over a wide range, then choose L1 based on the nominal input voltage. Always verify IRMS = I D (1 - D) converter _ CIN O at the input voltage extremes. operation IO C IN > 4 DV F The peak current IN SW SC4524C power transistor is at limit of 1 DVO = DIL ESR + 8 FSW C O
I R7 = C R VO (6) C5 = R 4IN=> 6 O - 1 41 .VIN FSW D0 V AC = IO V 1 whereC IN > the 1 DV log AC = - 20 IN is allowable input ripple voltage. FB C5 = C8 = 4 V CARVFSW FC C O VO D IN S GOV+ D 2 D= Multi-layerVceramic capacitors, which have very low ESR IN + VD - VCESAT 1 1 1 (a few mW) and can easily handle high RMS ripple current,. 0 C 8 = AC = - 20 log == R 15 -3 3 -6 are the ideal choice1for input 80 10 A single 4.7F. 3 7 3 28 6 . 10 2 filtering. 22 10 X5R ceramic( V + V ) (1 - D) capacitor is adequate for 500kHz or higher D DIL = O switching frequency applications, and 10F is adequate C 5 = 15 . 9 FSW L 1 for 200kHz to 500kHz switching frequency. For high 10 20 VFB R7 = =122 . 3 k 1 AC = 0 . 28 10 -3 - 20 log voltage applications, a small ceramic (1F or 2.2F) can be C = G R 2 F C V 8 C O placedLin = ( VO +CAwith a low ESR electrolytic capacitor to parallelVD )S (1 - D) O 1 1 20 % I and bulk capacitance Csatisfy both the3ESRO FSW 3 = 0 . 45 nF requirements. 5= 2 16 10 22 .1 10 1 1 1 .0 AC = - 20 log = 15 -3 3 -6 3 . 3 Vo 2 80 10 22 10 28 1 Output Capacitor 6 . 1 10 = C8 = I = 12pF Vc 2 RMS _ CIN 10I O 22 . (110D) 600 = 3 D 1 - 3 The output .9ripple voltage DVO of a buck converter can be 15 10 20 expressed as = 22 . 3 k R7 = G -3 Vo 0 . 28 10PWM (1 + s R ESR C O ) GPWM = 1 2 Vc (1 DVO/ = D)I(L1 +ESR + Q + s 2 / n ) + s p 1 s / n (7) 8 FSW0.C O nF C5 = = 45 2 16 10 3 22 . 1 10 3 where CO is the output capacitance. R7 = R 1 1 1 GPWM ,3 p 3 = 12pF , Z = , C8 = R as 2 G 600 Since CA R S 10 I 22 . 1 10 current DIL increasesESR C OD the inductor ripple R C O O C IN decreases >(Equation (3)), the output ripple voltage is C 5 = AC 4 DVIN FSW therefore the highest when VIN is at its maximum. 10 20 R7 = GPWM (1 + s R ESR C O ) Vo = gm 2 2 Vc 10F+to / p )(1 + s ceramic scapacitor is found adequate C 8 = A (1 s 47F X5R / n Q + / n ) 1 Cfor=output filtering in most applications. Ripple current 5 2 output in theFZ1 R 7 capacitor is not a concern because the R 1 1 GPWM 1 , p , Z = , RCO R ESR C O C 8 = GCA R S 11 2 FP1 R 7
AC
SC4524C
Applications Information (Cont.)
inductor current of a buck converter directly feeds CO, resulting in very low ripple current. Avoid using Z5U and Y5V ceramic capacitors for output filtering because these types of capacitors have high temperature and high voltage coefficients. Freewheeling Diode Use of Schottky barrier diodes as freewheeling rectifiers reduces diode reverse recovery input current spikes, easing high-side current sensing in the SC4524C. These diodes should have an average forward current rating at least 2A and a reverse blocking voltage of at least a few volts higher than the input voltage. For switching regulators operating at low duty cycles (i.e. low output voltage to input voltage conversion ratios), it is beneficial to use freewheeling diodes with somewhat higher average current ratings (thus lower forward voltages). This is because the diode conduction interval is much longer than that of the transistor. Converter efficiency will be improved if the voltage drop across the diode is lower. For the bootstrap circuit, a fast switching PN diode (such as 1N4148 or 1N914) and a small (0.33F - 0.47F) ceramic capacitor is sufficient for most applications. When bootstrapping from 2.5V to 3.0V output voltages, use a low forward drop Schottky diode (BAT-54 or similar) for D1. When bootstrapping from high input voltages (>20V), reduce the maximum BST voltage by connecting a Zener diode (D3) in series with D1 as shown in Figure 6 (b). If VOUT > 8V, then a protection diode D4 between the SW and the BST pins will be required as shown in Figure 6 (c). D4 can be a small PN diode such as 1N4148 or 1N914 if the operating temperature does not exceed 85 C. Use a small Schottky diode (BAT54 or similar) if the converter is to operate up to 125 C.
Minimum Bootstrap Voltage vs Temperature
Fig.5
SS270 REV 6-7
2.2 2.1 2.0 1.9 1.8 1.7 1.6 -50
The freewheeling diode should be placed close to the SW pin of the SC4524C to minimize ringing due to trace inductance. 20BQ030 (International Rectifier), B230A (Diodes Inc.), SS13, SS23 (Vishay), CMSH1-40M, CMSH140ML and CMSH2-40M (Central-Semi.) are all suitable. The freewheeling diode should be placed close to the SW pin of the SC4524C on the PCB to minimize ringing due to trace inductance. Bootstrapping the Power Transistor The typical minimum BST-SW voltage required to fully saturate the power transistor is shown in Figure 5, which is about 1.96V at room temperature. The BST-SW voltage is supplied by a bootstrap circuit powered from either the input or the output of the converter (Figure 6(a), 6(b) and 6(c)). To maximize efficiency, tie the bootstrap diode to the converter output if VO>2.5V as shown in Figure (a). Since the bootstrap supply current is proportional to the converter load current, using a lower voltage to power the bootstrap circuit reduces driving loss and improves efficiency.
Voltage (V)
ISW = -2.6A
-25
0
25
50
75
100 125
Temperature (o C)
Figure 5. Typical Minimum Bootstrap Voltage required to Saturate Transistor (ISW= -2.6A).
D1
BST VIN IN SW
C1 VOUT
SC4524C
GND
D2
(a)
Figure 6(a). Bootstrapping the SC4524C from the converter output
12
SC4524C
Applications Information (Cont.)
D3 D1
1 VFB 1 1 AC diagram in 1 VFB The block= - 20 logFigure 7shows the control loops of a AC = - 20 log G R 2 F C V CA S CO O G CAR S 2 FC C O innerloop (current VO buck converter with the SC4524C. The V C1 BST R 4 = R 6 VO - 1 = R O -1 loop) consists of a current sensing resistor (Rs=5.5mW) and R4 6 1 .0 V VIN VOUT 1 1 1 .0 1 . 0 VSW 1 1 a current = - 20 log with gain (GCA=18.5). The outer IN AC amplifier (CA) 1 .0 AC = - 20 log -3 3 3 -6 6 3 28 6 an 2 80 10 22 10 28 6 .. 1 10 - 2 80 10 3 22 a - 3 ..3 SC4524C VFB loop (voltage loop) consists1of10 error amplifier (EA), 10 1 D2 VAC = D- 20 log 1 +V V GND O VO + D D= G R 2 F C V PWM modulator, and a LC filter. D= V +V -V CO O CA S IN D CESAT VIN + VD - VCESAT 15 . 9 20 10 15 .9 10 20 Since the = R 7 current loop is internally closed, the remaining = 22 . 3 k (b) R7 = 1 1 . -3 = 22 . 3 k 28 compensation task1 the0loop100 3 = 15 . 9 dB is to design the voltage for 1 0 ..28 10 - AC = - 20 log D1 1 V -3 D4 2 103 22 10-6 FB 3 and A - ( VO + VD ) (1 - D) 28 6 .C1= 1020 log 80compensator (C5, R,. 3 1 C8). V + V ) (1 - D) 1 7 F C C5 = = 0 45 nF DIL = ( G CAR S 2C 5 C= O VO 3 = 0 ..45 nF DIL = O F D L 2 16 10 3 22 ..1 10 3 16 10 22 1 10 3 VO 2 SW L 1 1 F BST SW C1 R6 -1 For a converter with switching frequency FSW, output 15 . 9 1 .0 V VIN 1 1 1 10 VOUT>8V 10 20 1 C = .12 = 15 . 9 dB and pF C8 = pF AC. 3 k - 20 log inductance L1, output capacitance-6 3O = 12loading R, the = R7 ) C 8 -= INV + V = (1 - D) (VO + VD )SW1 - D) -3 = 22 3 ( O D 0 . 28 10 ( 2 2 600 10 33 )22 ..110 function in Figure 7 is output10 3 transfer 3 3 . 3 600 10 22 1 10 10 6 . 1 10 to 28 control (V ) 2 80 (V 22 L 1 = SC4524C = L1 C O 20 % IO FSW VO + VD 20 % IO FSW D2 1 given by: GND C5 = = 0 . 45 nF VIN + VD - VCESAT 2 16 10 3 22 . 1 10 3 15 .9 G (1 + s R ESR C O ) V GPWM (1 + s R ESR C O ) Vo = 10 20 (8) R7 = = 22 . 3 k Vo = (1 + s / PWM + s / Q + s 2 / 2 ) 2 2 IRMS _ CIN = I O D (1 - D) I IRMS _ CIN =CO = D (1 - D) 1 c p )(1 n n Vc (1 + s / p )(1 + s / n Q + s / n ) 0 . 28 10 -3 pF = 12 D4 is either a pn juntion diode or a Schottky diode 8 3 depending on the operating temperature. 22 . 1 10 2 600 10 3 1 This transfer function has a finite DC gain ( VO + VD ) (1 - D) (C) C5 = = 0 . 45 nF = 3 2 16 10 22 . 1 10 3 FSW L 1 R 1 1 GPWM R p 1 Z = 1 GPWM G R ,, p R C ,, Z = R C ,, Figures 6(b) and (c). Methods of 1 Bootstrapping 1 (1 +s R C ) the 1 CA S O ESR O GCA R S RCO R ESR C O DVO = DIL ESR + = ESR O DVO = DIL Vo ESR + 8 GPWM C C = SC4524C 2 ( VO + VD ) (1 - D) O (1 + s / FSW (1C Os8 n2 600 10 3 22 . 1 10 3 = 12pF 8 FSW + / Q + s 2 / n ) Vc p ) AC AC 20 20 % IO FSW 10 20 10 at Loop Compensation an ESRRzero FZ 7= R7 = g m gm R 1 G Vo 1 PWM GPWM is to shape the=frequency , (1 + s R ESRZC= ) , O , p of IO The goal D) compensation G R 2 12 IO C Vc 1 + sR C O S C IN > _ CIN = I D (1 - O C5 = R / = C IN >converterFso CA to achieve (high / p )(1 + s / n Q + s ESR1nO) response of the 4 DV C 5 2 F R as DC IN SW 4 DVIN FSW W CO Z1 7 2 FZ1 R 7 accuracy and fast transient response while maintaining a dominant low-frequency pole FP at AC 20 10 1 loop stability. 1 R7 = R 1 C8 = = C 8 21 F , R GPWM , p Z = , gm 1 2 C FP1 R 7 P1 7 GCA R S RO R ESR C O = DIL ESR + CONTROLLER AND SCHOTTKY DIODE 8 FSW C O 1 C= Io 5 AC and double poles at half the switching frequency. Rs CA 2 FZ1 R 7 10 20 R7 = gm 1 Including the voltage divider (R4 and R6), the control to REF C8 = + Vc PWM 2 F R7 feedback transfer function is found and plotted in Figure EA IO P1 MODULATOR 1 FB > L1 Vo C5 = SW 8 as the converter gain. 4 DVIN FSW 2 FZ1 R 7
12
Vramp
COMP C5 R7 C8 Co C8 = Resr
1R4 2 FP1 R 7
R6
Figure 7. Block diagram of control loops
Since the converter gain has only one dominant pole at low frequency, a simple Type-2 compensation network is sufficient for voltage loop compensation. As shown in Figure 8, the voltage compensator has a low frequency integrator pole, a zero at FZ1, and a high frequency pole at FP1. The integrator is used to boost the gain at low frequency. The zero is introduced to compensate the excessive phase lag at the loop gain crossover due to the
13
SC4524C
Applications Information (Cont.)
integrator pole (-90deg) and the dominant pole (-90deg). The high frequency pole nulls the ESR zero and attenuates high frequency noise.
60
where gm=0.3mA/V is the EA gain of the SC4524C. Example: Determine the voltage compensator for an 800kHz, 12V to 3.3V/2A converter with 22uF ceramic output capacitor. Choose a loop gain crossover frequency of 80kHz, and place voltage compensator zero and pole at FZ1=16kHz (20% of FC), and FP1=600kHz. From Equation (9), the required compensator gain at FC is
AC 20 log 1 18.5 5.5 10
3
30 GAIN (dB)
Fz1
Fp1
CO MP
EN SA TO
0
Fp
CO NV ER T ER
RG
AIN
Fc
GA IN
LO
OP G
AIN
-30
1 2 80 103 22 10
6
Fz -60 1K
Fsw/2
1.0 3.3
11.4dB
Then the compensator parameters are
10K 100K FREQUENCY (Hz) 1M 10M
1 VFB 1 AC = - 20 log G R 2 F C V CO O CA S Figure 8. Bode plots for voltage loop design
R7
10
11.4 20
0.3 10
3
12.4k
C5
1 2 16 103 12.4 103
1 103 12.4 103
0.8nF
1 1 1 .0 AC - procedure of the voltage loop design for -6 Therefore,=the20 log = 15 . 9 dB -3 3 3 .3 C 2 80 10 22 10 28 6 . 1 10 the SC4524C can be summarized as: 8 2 600
21pF
15 . 9 (1) Plot the converter gain, i.e. control to feedback transfer Select R7=12.4k, C5=1nF, and C8=22pF for the design. 10 20 function. = R7 = 22 . 3 k 0 28 10 -3 (2) Select the .open loop crossover frequency, FC, between Compensator parameters for various typical applications 1 10% and 20% of the switching frequency. At FC, find the are listed in Table 5. A MathCAD program is also available C5 = = 0 . 45 nF 3 2 16 10gain, A1. In typical applications with 22 . C 10 3 required compensator upon request for detailed calculation of the compensator ceramic output capacitors, the ESR zero is neglected and parameters. 1 C 8 = compensator gain at FC 3can12pF = be estimated by the required 2 600 10 3 22 . 1 10 1 VFB 1 (9) Thermal Considerations AC = - 20 log G R 2 F C V C O CA +S s R C )O GPWM (1 Vo ESR O (3) Place = compensator zero, FZ1,2 between 10% and the For the power transistor inside the SC4524C, the 2 Vc (1 + s / p )(1 + s / n Q + s / n ) 1 1 1 .0 20% of the crossoverfrequency, FC. conduction .loss PC, the switching loss PSW, and bootstrap AC = - 20 log = 15 9 dB -3 3 -6 3 . 3 loss P = can be + PBST + PQ 2 80 10 zero, (4) Use the compensator pole,FP1, to cancel the ESR 22 10 circuitPTOTAL BST,PC + PSWestimated as follows: 28 6 . 1 10 FZ. R 1 1 GPWM , p , Z = , (5) Then, the parameters of the compensation network C GCA15.9 S R RCO R ESR O PQ = VIN 2mA PC = D VCESAT IO 10 by can be calculated 20 R7 = = 22 . 3 k AC 0 . 28 10 -3 1 10 20 PSW = t S VIN I O FSW R7 = (10) 1 2 C 5 = gm = 0 . 45 nF 2 16 10 3 22 . 1 10 3 I 1 PBST = D VBST O C5 = 1 40 C 8 = 2 FZ1 R 7 3 = 12pF 2 600 10 22 . 1 10 3 1 where P BST is1 - D) V I voltage and tS is the equivalent V = ( the BST supply C8 = D DO 2 FP1 R 7 GPWM (1 + s R ESR C O ) Vo = 2 Vc (1 + s / p )(1 + s / n Q + s 2 / n ) 14 P = (1 .1 ~ 1 .3 ) I2 R
IND
O
DC
SC4524C
switching time of the NPN transistor (see Table 4). Table 4. Typical switching time
Input Voltage 12V 24V 28V Load Current 1A 2A 12.5ns 15.3ns 22ns 25ns 25.3ns 28ns
PCB Layout Considerations In a step-down switching regulator, the input bypass capacitor, the main power switch and the freewheeling diode carry pulse current (Figure 9). For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power switch is already integrated within the SC4524C, connecting the anode of the freewheeling diode close to the negative terminal of the input bypass capacitor minimizes size of the switched current loop. The input bypass capacitor should be placed close to the IN pin. Shortening the traces of the SW and BST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes. The exposed pad should be soldered to a large ground plane as the ground copper acts as a heat sink for the device. To ensure proper adhesion to the ground plane, avoid using vias directly under the device.
+ PBST + Paddition, the quiescent current loss is In Q
PQ = VIN 2mA
(11)
The total power loss of the SC4524C is therefore I O FSW
PTOTAL = PC + PSW + PBST + PQ
O
(12)
0 IO
The temperature rise of the SC4524C PQtheVIN 2mA of the is = Fig.9 product PC = D VCESAT IO total power dissipation (Equation (12)) and qJA (36oC/W), which is the thermal impedance from junction to ambient 1 for thePSW = 2 EDPpackage. SW SOIC-8 t S VIN I O F
I ) I2 R DC is not recommended to operate the SC4524C above It O PBST = D VBST O o 40 125 C junction temperature. In the applications with high input voltage and high output current, the switching frequency may D) VD toObe reduced to meet the thermal PD = (1 - need I requirement. PIND = (1 .1 ~ 1 .3 ) I2 R DC O
V IN
VOUT
ZL
Figure 9. Heavy lines indicate the critical pulse current loop. The stray inductance of this loop should be minimized.
Vin
15
C
SC4524C
Recommended Component Parameters in Typical Applications
Table 5 lists the recommended inductance (L1) and compensation network (R7, C5, C8) for common input and output voltages. The inductance is determined by assuming that the ripple current is 35% of load current IO. The compensator parameters are calculated by assuming a 22mF low ESR ceramic output capacitor and a loop gain crossover frequency of FSW/10. Table 5. Recommended inductance (L1) and SC4524C Compensator Parameters compensator (R7, C5, C8)
Vin(V) Typical Applications Vo(V) Io(A) Fsw(kHz) 1 1.5 500 2 500 1 1000 2.5 500 2 1000 500 1 1000 3.3 500 2 1000 500 1 1000 5 500 2 1000 500 1 1000 7.5 500 2 1000 500 1 1000 10 500 2 1000 1 1.5 300 2 1 2.5 2 500 1 3.3 2 500 1 1000 5 500 2 1000 500 1 1000 7.5 500 2 1000 500 1 1000 10 500 2 1000 C2(uF) Recommended Parameters L1(uH) R7(k) C5(nF) C8(pF) 8.2 4.32 3.3 10 4.7 15 6.81 1.5 22 6.8 12.1 0.82 10 6.8 6.81 1.5 22 3.3 12.1 0.68 10 15 9.09 1 22 8.2 18.7 0.68 10 8.2 9.09 1 22 4.7 18.7 0.68 15 14.3 0.82 10 24.9 0.68 8.2 14.3 0.82 4.7 27.4 0.68 15 21.5 0.82 10 8.2 38.3 0.68 8.2 21.5 0.82 4.7 38.3 0.68 10 25.5 0.82 4.7 51.1 0.68 4.7 25.5 0.82 2.2 51.1 0.68 10 5.49 3.3 47 8.2 15 7.5 1.5 8.2 10 22 9.09 1 10 22 12.1 0.82 22 15 26.1 0.68 10 10 12.1 0.82 22 6.8 26.1 0.68 10 33 21.5 0.82 15 38.3 0.68 10 21.5 0.82 22 8.2 38.3 0.68 10 22 26.1 0.82 22 10 51.1 0.68 10 10 26.1 0.82 22 8.2 51.1 0.68 10
12
22
24
16
SC4524C
Typical Application Schematics
V IN 24V C4 4.7 F D3 D1
18V Zener 1N4148 IN BST SW SS/EN
C1 0.33 F
L1 R4 33.2k
OUT 1.5V/2A
8.2 H
SC4524C
FB
COMP C7 10nF R7 5.49k
ROSC
GND D2 20BQ030 R6 66.5k C2 22 F
C8 47pF
R5 69.8k
C5 3.3nF
L1: Coiltronics DR73-8R2
C2: Murata GRM31CR60J226K C4: Murata GRM32ER71H475K
Figure 10. 300kHz 24V to 1.5V/2A Step-down Converter
V IN
10V - 26V C4 4.7 F
D1 1N4148 C1 0.33 F L1 8.2 H R4 33.2k
IN
BST SW
OUT 3.3V/2A
SS/EN
SC4524C
FB
COMP C7 10nF R7 10.7k C5 1nF
ROSC
GND D2 20BQ030 R6 14.3k C2 22 F
C8 33pF
R5 25.5k
L1: Coiltronics DR73-8R2
C2: Murata GRM31CR60J226M C4: Murata GRM32ER71H475K
Figure 11. 700kHz 10V-26V to 3.3V/2A Step-down Converter
17
Fig.12(b) SS
Typical Performance Characteristics
SS270 REV 6-7
SC4524C
(For A 24V to 5V/2A Step-down Converter with 1MHz Switching Frequency)
Load Characteristic
6 5
Output Voltage (V)
4 3 2 1 0 0 0.5 1 1.5 2 2.5 3
24V Input (10V/DIV)
5V Output (2V/DIV)
SS Voltage (1V/DIV)
R
Load Current (A)
Figure 12(a). Load Characteristic
Fig.12(d) OCP
10ms/DIV
Figure 12(b). VIN Start up Transient (IO=2A)
5V Output Short (5V/DIV)
5V Output Response (500mV/DIV, AC Coupling)
Inductor Current (1A/DIV)
Retry Inductor Current (2A/DIV)
SS Voltage (2V/DIV)
40us/DIV
20ms/DIV
Figure 12(c). Load Transient Response (IO= 0.3A to 2A)
Figure 12(d). Output Short Circuit (Hiccup)
18
SC4524C
Outline Drawing - SOIC-8 EDP
A N 2X E/2 E1 E 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A A1 C A-B D e D
DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX
A A1 A2 b c D E1 E e F H h L L1 N 01 aaa bbb ccc .069 .005 .065 .020 .010 .193 .197 .154 .157 .236 BSC .050 BSC .116 .120 .130 .085 .095 .099 .010 .020 .016 .028 .041 (.041) 8 0 8 .004 .010 .008 .053 .000 .049 .012 .007 .189 .150 1.35 0.00 1.25 0.31 0.17 4.80 3.80
C
bxN bbb F
1.75 0.13 1.65 0.51 0.25 4.90 5.00 3.90 4.00 6.00 BSC 1.27 BSC 2.95 3.05 3.30 2.15 2.41 2.51 0.25 0.50 0.40 0.72 1.04 (1.05) 8 0 8 0.10 0.25 0.20
h
EXPOSED PAD H
H GAGE PLANE 0.25
h
c
L (L1)
01
SEE DETAIL SIDE VIEW
NOTES: 1. 2. 3. 4.
A
DETAIL
A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. REFERENCE JEDEC STD MS -012, VARIATION BA.
19
SC4524C
Land Pattern - SOIC-8 EDP
E D
SOLDER MASK
DIMENSIONS
DIM
(C)
F
G
Z
Y THERMAL VIA O 0.36mm
NOTES: 1.
P X
C D E F G P X Y Z
INCHES (.205) .134 .201 .101 .118 .050 .024 .087 .291
MILLIMETERS (5.20) 3.40 5.10 2.56 3.00 1.27 0.60 2.20 7.40
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. REFERENCE IPC-SM-782A, RLP NO. 300A. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
2. 3.
20
SC4524C
(c) Semtech 2010 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTEDTO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER'S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Contact Information
Semtech Corporation Power Mangement Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804
21

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